Computing Nodes

Multi-core ARM + FPGA-based custom Accelerator+ ExaNet scalable network

  • CRDB: EuroEXA computing node (Co-Design Recommended Daughter Board)
    • FPGA-based module made of
      • SoC (Xilinix ZU9 ARM-based) as network peer
      • Large FPGA (Xilinix VU9P) as accelerator 
    • Support for Global Shared Address Space (GSAS) with UNIMEM
    • ExaNet integrated network
    • Testbed (TB2) ~200 CRDB in 1Q20 
  • EuroEXA ASIC: quad-core ARM-based custom SOC 
    • Multicore ARM
    • Memory  ARM Memory Compression IP
    • Coupled to VU9P accelerator and ZU9 based networking solution in testbed 3 (TB3) Q121