Glossary

The following list of terms and abbreviations used within the EuroEXA project has been compiled to unify terminology. This is a live document so is subject to change at any point throughout the project.

Term

Definition

Term

Definition

APU

Application Processing Unit

MPSoC

Multi-Processor System-on-Chip

ARO

Address Resolution Protocols

NI

Netework Interface

ASIC

Application-Specific Integrate Circuit

ODE

Ordinary Differential Equation

BMC

Board Management Controller 

OFI

Open Fabric Interface

BMC

Board Mezzanine Controller 

OS

Operating System

CCI

Cache Coherent Interconnect 

PDID

Protection Domain ID

CN

Computing Node

PFC

Ethernet Priority Flow Control

CR

Compression Ration

PGAS

Partitioned Global Address Sorting

DFE

DataFlow Engine

PHY

LDPDDR4mphy V2

DIMM

Dual In-Line Memory Module

PL

Programmable Logic

DMA

Direct Memory Access

PMU

Power Management Unit

ECC

Error Correction Code

PS

Programmable System

EDC

Error Detection Code

QFDB

Quad FPGA Daughterboard

FPGA

Field Programmable Gate Array 

RAS

Resiliency Availability Serviceability

FRP

Flow Rate Packet

RDMA

Remote Direct Memory Access

GASPI

Global Address Space Programming Interface

RTL

Register-Transfer Level

GIC

ARM Interrupt Controller

RTOS

Real Time Operating System

GSAS

Global Shared Address Space 

SDN

Software Defined Networking

HLS

High Level Synthesis

SMMU

System Memory Management Unit

HSS

High Speed Serial Links

SoA

State of the Art

IOMMU

Input-Output Memory Management Unit

SoC

System on Chip

IPMI

Intelligent Platform Management Interface

U

Utilization Factor

MC

Memory Controller

VC

Virtual Channel 

MDC

Modular Data Centre

VCT

Virtual Cut-Through 

MMU

Memory Management Unit

vmbox

Virtualized Mailbox

MPI

Message Passing Interface

VMM

Virtual Memory Manager